• 250 ps Resolution (4 GHz) timing zoom to find elusive timing problems quickly
• Large 15" display with optional touch screen
• 1 M Memory standard, upgradeable to 4/16/32M
• 250 MHz State, optional to 450 MHz
• Models available with 48-ch pattern generator
• View Scope seamlessly integrates your scope and logic analyzer waveforms into a single display

Agilent 16800 Series portable logic analyzers offer the performance, applications, and usability your digital development team needs to quickly debug, validate, and optimize your digital system - at a price that fits your budget. The logic analyzer's timing and state acquisition gives you the power to:

• Accurately measure precise timing relationships using 4 GHz (250 ps) timing zoom with 64 K depth.
• Find anomalies separated in time with memory depths upgradeable to 32 M.
• Buy what you need today and upgrade in the future. 16800 Series logic analyzers come with independent upgrades for memory depth and state speed.
• Sample synchronous buses accurately and confidently using eye finder. Eye finder automatically adjusts threshold and setup and hold to give you the highest confidence in measurements on high-speed buses.
• Track problems from symptom to root cause across several measurement modes by viewing time-correlated data in waveform/chart, listing, inverse assembly, source code, or compare display.
• Set up triggers quickly and confidently with intuitive, simple, quick, and advanced triggering. This capability combines new trigger functionality with an intuitive user interface.
• Access the signals that hold the key to your system's problems with the industry's widest range of probing accessories with capacitive loading down to 0.7 pF
• Monitor and correlate multiple buses with split analyzer capability, which provides single and multi-bus support (timing, state, timing/state or state/state configurations).

Logic analyzer probes are ordered separately. Please specify probes when ordering to ensure the correct connection between your logic analyzer and the device under test. See datsheet for selection.

For models with a pattern generator, order at least one clock pod and at least one data pod for every 8 output channels. See datsheet for selection.